| 000 | 00587nam a22001697a 4500 | ||
|---|---|---|---|
| 082 |
_a621.381 5 _bK191R |
||
| 100 |
_aKasherwa, Harsh Kumar _946159 |
||
| 245 |
_aReconfigurable Implementation of DL Models for Edge Devices _cby Harsh Kumar Kasherwa |
||
| 260 |
_aDepartment of Electrical Engineering _bIIT Jodhpur _c2023 |
||
| 300 |
_avi, 30p. _bHB |
||
| 650 |
_aMachine Learning at the Edge _946160 |
||
| 650 |
_aField-Programmable Gate Arrays (FPGAs) _946161 |
||
| 650 | _aDepartment of Electrical Engineering | ||
| 650 | _aMTech Theses | ||
| 700 |
_aKumar, Binod _946162 |
||
| 942 | _cTH | ||
| 999 |
_c16750 _d16750 |
||