000			03223nam a2200361Ia 4500
000			04005nam a22003975i 4500
001			978-3-031-31663-0
003			DE-He213
005			20240319120945.0
007			cr nn 008mamaa
008			230817s2023 sz | s |||| 0|eng d
020			_a9783031316630 _9978-3-031-31663-0
082			_a3.54
100			_aAbbas, Syed Mohsin. _933682
245			_aGuessing Random Additive Noise Decoding _cby Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross. _h[electronic resource] :
250			_a1st ed. 2023.
260			_aCham _bSpringer Nature Switzerland _c2023
300			_aXIV, 151 p. 114 illus., 101 illus. in color. _bonline resource.
520			_aThis book gives a detailed overview of a universal Maximum Likelihood (ML) decoding technique, known as Guessing Random Additive Noise Decoding (GRAND), has been introduced for short-length and high-rate linear block codes. The interest in short channel codes and the corresponding ML decoding algorithms has recently been reignited in both industry and academia due to emergence of applications with strict reliability and ultra-low latency requirements . A few of these applications include Machine-to-Machine (M2M) communication, augmented and virtual Reality, Intelligent Transportation Systems (ITS), the Internet of Things (IoTs), and Ultra-Reliable and Low Latency Communications (URLLC), which is an important use case for the 5G-NR standard. GRAND features both soft-input and hard-input variants. Moreover, there are traditional GRAND variants that can be used with any communication channel, and specialized GRAND variants that are developed for a specific communication channel. This book presents a detailed overview of these GRAND variants and their hardware architectures. The book is structured into four parts. Part 1 introduces linear block codes and the GRAND algorithm. Part 2 discusses the hardware architecture for traditional GRAND variants that can be applied to any underlying communication channel. Part 3 describes the hardware architectures for specialized GRAND variants developed for specific communication channels. Lastly, Part 4 provides an overview of recently proposed GRAND variants and their unique applications. This book is ideal for researchers or engineers looking to implement high-throughput and energy-efficient hardware for GRAND, as well as seasoned academics and graduate students interested in the topic of VLSI hardware architectures. Additionally, it can serve as reading material in graduate courses covering modern error correcting codes and Maximum Likelihood decoding for short codes.
650			_aArithmetic and Logic Structures. _933683
650			_aCoding and Information Theory. _933684
650			_aCoding theory. _933685
650			_aCommunications Engineering, Networks. _933686
650			_aComputer arithmetic and logic units. _933687
650			_aInformation theory. _933688
650			_aLogic design. _933689
650			_aLogic Design. _933690
650			_aTelecommunication. _933691
700			_aGross, Warren J. _933692
700			_aJalaleddine, Marwan. _933693
856			_uhttps://doi.org/10.1007/978-3-031-31663-0
942			_cEBK _2ddc
999			_c15412 _d15412