000			01228nam#a2200253ua#4500
008			041210s2005 njua b 001 0 eng
020			_a9788126520374
082			_a621.397 32 _bB176C
100			_aBaker, R. Jacob _d1964 _911862
245			_aCMOS Circuit Design, Layout, and Simulation _cby R. Jacob Baker.
250			_a2nd ed.
260			_aNew Delhi _bIEEE Press/ Wiley India _cc2005.
300			_axxxiii, 1038 p. _bill. _c25 cm.
440			_aIEEE Press series on microelectronic systems _911863
504			_aIncludes bibliographical references and index.
650			_aMetal oxide semiconductors, Complementary _911864
650			_aIntegrated circuits _911865
650			_aMetal oxide semiconductor field-effect transistors. _911866
710	2		_aInstitute of Electrical and Electronics Engineers. _911867
856	4	2	_3Contributor biographical information _uhttp://www.loc.gov/catdir/enhancements/fy0620/2004275960-b.html
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0620/2004275960-d.html
856	4	1	_3Table of contents only _uhttp://www.loc.gov/catdir/enhancements/fy0620/2004275960-t.html
856	4	2	_3Book review (E-STREAMS _uhttp://www.e-streams.com/es0902/es0902_4363.html
999			_c10410 _d10410