Design of a low offset and low noise Dynamic Comparator for area and power efficient SAR ADC by Anjana Singh

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TextPublication details: IIT Jodhpur Department of Electrical Engineering 2021Description: vi;20pSubject(s):

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Holdings
Item type	Home library	Call number	Status	Date due	Barcode	Item holds
Thesis	S. R. Ranganathan Learning Hub	621.395 S617D (Browse shelf(Opens below))	Not for loan		TM00229

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