High speed Integrator Design for column parallel Readout in CMOS image sensors by Siddhant Kumar Srivastava

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TextPublication details: IIT Jodhpur Department of Electrical Engineering 2021Description: v;20pSubject(s):

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Item type	Home library	Call number	Status	Date due	Barcode	Item holds
Thesis	S. R. Ranganathan Learning Hub	621.3815 S774D (Browse shelf(Opens below))	Not for loan		TM00227

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